K4S281632D-L1H, K4S - 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL

Samsung semiconductor

The K4S281632D-L1H by Samsung semiconductor is a 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL. Below is the official datasheet preview.

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K4S281632D-L1H 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL by Samsung semiconductor - Datasheet Preview — Official preview page of the **K4S281632D-L1H** 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL datasheet (Samsung semiconductor).

Datasheet Details

Part number	K4S281632D-L1H, K4S
Manufacturer	Samsung semiconductor
File Size	112.04 KB
Description	128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL
Datasheet	K4S-28163.pdf
Note	This datasheet PDF includes multiple part numbers: K4S281632D-L1H, K4S. Please refer to the document for exact specifications by model.
Additional preview pages of the K4S281632D-L1H datasheet.

K4S281632D-L1H Product details

Description

The K4S281632D is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Features

JEDEC standard 3.3V power supply.
LVTTL compatible with multiplexed address.
Four banks operation.
MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave).
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation.
DQM for masking.
Auto & self refresh.
64ms refresh period (4K cycle.

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Other Datasheets by Samsung semiconductor

K4S281632D-L1L - 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL
K4S281632D-L55 - 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL
K4S281632D-L60 - 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL
K4S281632D-L75 - 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL
K4S281632D-L7C - 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL
K4S281632D-NC1H - 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL

Published: Apr 7, 2005 |